Pseudo-Random Number Generators for Vector Processors and Multicore Processors

There is a lack of good pseudo-random number generators capable of utilizing the vector processing capabilities and multiprocessing capabilities of modern computers. A suitable generator must have a feedback path long enough to fit the vector length or permit multiple instances with different parameter sets. The risk that multiple random streams from identical generators have overlapping subsequences can be eliminated by combining two different generators. Combining two generators can also increase randomness by remedying weaknesses caused by the need for mathematical tractability. Larger applications need higher precision. The article discusses hitherto ignored imprecisions caused by quantization errors in the application of generators with prime modulus and when generating uniformly distributed integers with an arbitrary interval length. A C++ software package that overcomes all these problems is offered. The RANVEC1 code combines a Mersenne Twister variant and a multiply-with-carry generator to produce vector output. It is suitable for processors with vector sizes up to 512 bits. Some theorists have argued that there is no theoretical proof that the streams from different generators are statistically independent. The article contends that the request for such a proof misunderstands the nature of the problem, and that the mathematical tractability that would allow such a proof would also defeat it. This calls for a more fundamental philosophical discussion of the status of proofs in relation to deterministic pseudo-random sequences.